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MIPI-I3C Combo IP Host/Target HDR-DDR compliance with Spec v1.1.1
MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication. The MIPI I3C interface has been developed to ease sensor system design architectures in mobile sensor and IoT / automotive sensor wireless products by providing a fast, low cost, low power.
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Block Diagram of the MIPI-I3C Combo IP Host/Target HDR-DDR compliance with Spec v1.1.1
Sensor IP
- Digital Sensor - Universal and Digital Fault Injection Attack Detector - PQC Ready
- PVT Sensor - TSMC 7FF
- PVT Sensor - TSMC N5
- Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard
- Intelligent Sensor and Power Management Design Platform
- High Performance Scalable Sensor Hub DSP Architecture