MIPI I3C Master and Slave Controllers delivers high bandwidth and scalability for integration of multiple sensors

As Sensor data rate increases, there is a necessity to have control information flowing to and from sensors at an efficient data rate. Also, to bridge the gap of digital interface fragmentation of various interfaces like I2C/SPI/UART, MIPI has come up with a solution of MIPI I3C interface. Also, the traditional interfaces like I2C/SPI/UART would require additional sideband signals like interrupts/chip select/enable/sleep signals. These additional signals increase the pin counts. MIPI I3C interface presents a fast, low cost, low power, two wire digital interfaces for sensors. Apart from increased data rate, I3C also has support for legacy devices operating in FM and FM+ modes. I2C-like communication with SCL clock speed up to 12.5 MHz MIPI-defined transmissions allowing the master to communicate with one or all slaves on the bus HDR mode using ternary number symbols to achieve two data transmissions per equivalent clock cycle. A subset of I2C communication to legacy I2C slaves, if present on the bus
Slave initiated request to master, e.g. in-band interrupt, address request

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