The logiJPGE Motion JPEG Encoder is JPEG standard Baseline DCT compliant encoder IP core for still image and video decompression applications on Xilinx All Programmable SoC and FPGA devices. It includes all logic blocks necessary for quick implementations of AXI4 streaming based SoC architectures and enables on-the-fly JPEG compression of input video with resolutions up to 2048x2048.
The logiJPGE decreases the data throughput required for video transport, i.e. in the Ethernet-based video camera, the required bandwidth of 2400 Mbps for FullHD video can be decreased to easily managable 100 Mbps!
The logiJPGE is fully embedded into Xilinx Vivado Design Suite to hide a complexity from the end-user and to make its integration with the on-chip AMBA AXI4 bus easy. The logiJPGE reference design, which is on request available from Xylon, can be used as a starting point to evaluate and develop Xilinx-based MJPEG video processing embedded systems.
- Supports Xilinx® Zynq®-7000 AP SoC and 7 series FPGA families
- Compliant with the Baseline Sequential DCT mode of the ISO/IEC 10918-1 JPEG standard
- On-the-Fly video encoding to Motion JPEG stream
- Configurable video compression factor
- Video input/output resolutions up to 2048x2048
- Pixel formats: YUV 4:2:0 and YUV 4:2:2
- No programming required
- AMBA® AXI4-Stream compliant video input/output
- IP deliverables include documentation and technical support
- Reference design available on request
- Available for Xilinx Vivado® Design Suite
- IP core in Vivado compatible format
- tech support
- ref. design on request
- camera designs
- Multi-camera ADAS applications
- Multi-camera Surveillance
Block Diagram of the Motion JPEG Encoder IP Core