The Multi-Channel Direct Memory Access (MCDMA) Controller is designed to improve microprocessor system performance by allowing external devices to directly transfer information from the system memory. Memory-to- memory transfer capability is also supported.
The MCDMA Controller core supports two modes: 8237 and non-8237. When the 8237 mode is selected, it configures the core to be compatible with the Intel 8237A DMA Controller with a few variations. These variations are listed in the "Compatibility Differences with the 8237 Intel Device" section of the datasheet. The 8237 mode supports four independent channels while the non-8237 mode supports up to 16 independent channels.
- Selectable 8237 Mode
- Configurable up to 16 Independent DMA Channels for Non-8237 Mode
- Configurable Data Width of 8, 16, 32 or 64 Bits for Non-8237 Mode
- Configurable Address Width of 16, 24 or 32 Bits for Non-8237 Mode
- Configurable Word Count Register Width for Non-8237 Mode
- Independent Auto-initialization of All Channels
- Memory-to-Memory Transfers on Single, Block, and Demand Transfer Modes
- Memory Block Initialization
- Software DMA Requests
Block Diagram of the Multi-channel DMA Controller IP Core