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250MHz Multi-channel High Speed Analog Front-End (AFE) for LiDAR, 5G and imaging
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Multi Function IO interface (PCI/PCIX/DDR/LVDS/GPIO) - TSMC 65nm LP (CLN65LP)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully compliant with the DFI 3.1 specification, and features include slew rate control, per-bit de-skew, gate training, read and write leveling and built-in self test (BIST).
View Multi Function IO interface (PCI/PCIX/DDR/LVDS/GPIO) - TSMC 65nm LP (CLN65LP) full description to...
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