The AlphaCORE MSIO IP is a bi-directional general purpose I/O that supports single ended and differential signalling schemes for parallel interfaces up to 800Mbps. This ancillary IP is provided by AlphaWave to deliver the world’s most comprehensive portfolio of configurable IO connectivity IP solutions.
- Extensive configurability
- MSIO supports bi-directional, single-ended and differential signalling to meet all SOC parallel interface signaling needs. This includes support of legacy 1.8V interfaces to modern 1.1V voltage levels.
- Leading performance
- MSIO delivers configurable output drive strengths and receiver hysteresis levels to ensure robust operation in the harshest of SOC applications.
- Ease of integration
- The ultra-small Alphawave MSIO is delivered with a comprehensive package of SOC and signal integrity IP deliverables, spanning from Verilog, to GDS, timing, DFT and physical IP models
- Supported Signaling Standards
- LVCMOS18, LVCMOS15, LVCMOS12
- HSTL_18, HSTL, DIFF_HSTL
- SSTL18, SSTL15/135, SSTL12
- DIFF_SSTL18, DIFF_STL15, DIFF_SSTL12
- Programmable bi-directional, single ended and differential IO. Includes configurable hysteresis levels and output drive strengths, up to 12mA.
- Devices Used
- Standard CMOS digital devices