Multistandard PHY Control Processor
The CEVA-X2 has been specifically designed to tackle the huge PHY control complexity increase of LTE-Advanced Pro which includes Rel.13 multi-carrier and multi-standard handsets. PHY Control task challenges include:
• Support capacity increase up to 1.2Gbps in Rel.13 through the aggregation of 5 carriers and the use of MIMO 4x4 and 256 QAM. Control performance scales with the number of carriers and the PHY controller also needs to perform measurements, calibration and other processing functions per carrier,
• Support Dual-Connectivity to improve offload to Small-Cells and handle concurrent baseband connectivity to both macro and small cells,
• Merge efficiently Multi-RAT modems (LTE-A, 3G, TD-SCDMA, 2G) into a single unified modem to support dual SIMs, concurrent data over LTE-A and voice over 2G or 3G until VoLTE is widely deployed. Such a feature very low latency task switch to schedule modems concurrently,
• Control the whole modem datapath at the system level with its multiple DSPs and UL/DL coprocessors and HW accelerators, without Controller overhead. This requires sophisticated mechanisms such as Queue and Buffer Managers, QoS, Flow Control, to automatically schedule PHY components under ultra-low latency with minimal overhead,
• VoLTE EVS requires 5 to 10 times the complexity (performance and memory footprint) of previous generation voice codecs,
• Battery life needs to remain competitive despite the huge complexity increase.
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Block Diagram of the Multistandard PHY Control Processor IP Core

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