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Ncore 3 Coherent Network-on-Chip (NoC)
For scalable and area-efficient heterogeneous cache coherent systems.
The Arteris Ncore Cache Coherent Interconnect IP offers unparalleled scalability, configurability, and, with the Ncore Safety Option, data protection and hardware duplication capabilities to help meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
Version 3.6 of the Ncore Cache Coherent Interconnect IP adds support for the AMBA CHI-E protocol as well as interoperability of CHI-B and ACE, and ACE-Lite protocols in the same coherent system. AXI is also supported and Ncore will enable it to access CPU caches in an IO coherent way.
Ncore is scalable, supporting up to 16 coherent CPU clusters or other coherent agents.
It incorporates multiple configurable snoop filters, multiple configurable proxy caches, and multiple clock domains, using a modular, distributed architecture to provide system architects the most advanced technology and more degrees of freedom to innovate.
The Arteris Ncore Cache Coherent Interconnect IP offers unparalleled scalability, configurability, and, with the Ncore Safety Option, data protection and hardware duplication capabilities to help meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
Version 3.6 of the Ncore Cache Coherent Interconnect IP adds support for the AMBA CHI-E protocol as well as interoperability of CHI-B and ACE, and ACE-Lite protocols in the same coherent system. AXI is also supported and Ncore will enable it to access CPU caches in an IO coherent way.
Ncore is scalable, supporting up to 16 coherent CPU clusters or other coherent agents.
It incorporates multiple configurable snoop filters, multiple configurable proxy caches, and multiple clock domains, using a modular, distributed architecture to provide system architects the most advanced technology and more degrees of freedom to innovate.
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Block Diagram of the Ncore 3 Coherent Network-on-Chip (NoC) IP Core
