Ncore 3 Coherent Network on Chip (NoC)
The Arteris IP Ncore Cache Coherent Interconnect IP offers unparalleled scalability, configurability, and, with the optional Ncore Fusa Option, data protection, and hardware duplication capabilities to help meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
Version 3 of the Ncore Cache Coherent Interconnect IP adds support for the AMBA CHI protocol as well as interoperability of CHI and ACE protocols in the same coherent system.
Ncore is scalable, supporting up to 16 coherent CPU clusters or other coherent agents.
It incorporates multiple configurable snoop filters, multiple configurable proxy caches, and multiple clock domains, using a modular, distributed architecture to provide system architects the most advanced technology and more degrees of freedom to innovate.
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Block Diagram of the Ncore 3 Coherent Network on Chip (NoC)

NoC interconnect IP
- FlexNoC 5 Network on Chip (NoC)
- High speed NoC (Network On-Chip) Interconnect IP
- Network-on-Chip (NoC) Interconnect IP
- FlexNoC Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
- FlexNoC 5 Option For Scalability and Performance Critical Systems
- Scalable Cache Coherency