This NFC controller IP includes Analog & Digital IP.
This offer is for all semiconductor vendors who want to develop their own NFC controller.
- Process: 180nm TSMC or 65nm TSMC(Test version)
- Diesize(incl. pads): 3,000 x 3,000
- Power Consumption: 20 uA(sleep mode), 80mA(active mode)
- CPU: 8051
- I/F: SPI, IIC, UART
- Clock: 27.12 MHz
- Code Memory: Flash 64KB(for fixed data)
- Data Memory: SRAM(10kB)
- SDK: Available
- It will be faster and easier solution for any of semiconductor vendor who wants to jump into NFC world asap.
- Target market is Automotive, NFC reader, printer, and so on. Also, it will be a good solution for mobile/smartphone market.
- RF possible to migrate to another RF process.
- Crossborder Technologies Korea is also providing NFC protocol stack and Firmware. Together with these solutions, it will be a total complete solution for NFC controller.
- TRL code(VHDL) of NFC protocol, SWP, and other peripherals
- RTL code of NFC chip architecture(bus, buffer, control register, etc)
- Analog circuit(LNA, TIA, Baseband, ADC) and LDO(3.3V to 1.8V)
- Analog GDS