The Northwest Logic Mem Test Analyzer Core from Rambus is used to capture the results from Northwest Logic Memory Test Core.
The Mem Test Analyzer Core can be used in conjunction with the Memory Test Core to capture the actual and expected test data. The capture is initiated by an error trigger signal provided by the Memory Test Core. This data can then be retrieved from the Mem Test Analyzer Core via the chip’s configuration & status bus, on-chip processor or dedicated low-pin count serial port.
Rambus also offers easy-to-use scripts, driver and USBI2C bridge board to retrieve and analyze the data captured by the Data Analyzer Core.
The core is useful for chip and board validation. It provides low-cost, built-in logic analyzer capability similar in concept to the FPGA-based internal logic analyzer tools.