Deeply Embedded AI Accelerator for Microcontrollers and End-Point IoT Devices
NVME Host IP
To show all of these new features, new demos, from which customers can re-use to start their project, have been done :
- Sequential access with one or two disks (RAID0) with or without FAT32.
- Random access evaluation.
- Simultaneous write access and read access (Multi users).
- CPU (C Source code provided) or State Machine (VHDL provided) Demo.
All of these features in one single IP !
The Zynq Ultra Scale + is the first FPGa family to support this new NVME HOST IP.
View NVME Host IP full description to...
- see the entire NVME Host IP datasheet
- get in contact with NVME Host IP Supplier