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PCI Express (PCIe) Gen3 x16
The Controller IP for PCIe 3.0 has over 100 configuration features, and 1500+ input parameters, to customize the controller to the specific needs of any application. With rich configurations and product features, the PCIe 3.0 controller is architected to quickly and easily integrate into any SoC, and connect seamlessly to a Cadence, or third-party, PIPE 3.0- or PIPE 4.2-compliant PHY. With consumers need for mobile devices capable of providing enough processing power to perform tasks like making payments, playing and streaming HD videos and playing demanding video games, the Controller is a high performance solution, benchmarked at 95% of theoretical maximum throughput.
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PCIe IP
- PCIe Controller Testbench
- PCIe 5.0 PHY in TSMC (16nm)
- PCIe 5.0 Customizable Embedded Multi-port Switch
- PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect