PCI Express x1, x4 Root Complex Lite IP Core
Lattice’s PCI Express Root Complex (RC) Lite core provides an x1 or x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCI express protocol stack. This IP is a lighter version of the root complex intended to use in simple bridging application to local bus. This solution supports the high value, low power LatticeECP3 and LatticeECP2M FPGA device families.
Solutions
* Download demo bitstream from the PCI Express Demo page.
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Block Diagram of the PCI Express x1, x4 Root Complex Lite IP Core
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