PCIe 2.0 End Point IP Core - PCIe with FIFO Interface
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Block Diagram of the PCIe 2.0 End Point IP Core - PCIe with FIFO Interface

PCI PCI Express IP
- PCI Express 5.0/4.0/3.0/2.1/1.1 Core from Rambus
- Complete PCIe 4.0 Soft IP supporting endpoint, root port, switch, bridge and advanced features such as SR-IOV, multi-function, data protection (ECC, ECRC), ATS, TPH, AER and more
- Configurable PCI Express 4.0 Controller for ASIC/SoC with a configurable AMBA AXI3/AXI4 user interface
- PCIe 5.0 Controller
- Gen5 PCIe Hybrid Controller with SR-IOV and ARI Support
- Gen5 PCIe Transparent Switch