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PCIe 3.0/2.0 PHY
With sophisticated architecture and advanced technology, KNiulink PCIE GEN3/GEN2 PHY IP with PMA and PCS layer is designed for low power and high performance application. It is fully compatible with PCIE GEN1 & GEN2 & GEN3 specification, and supports link rate of 2.5Gbps, 5Gbps and 8Gbps.
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PCIe 3.0/2.0 PHY IP
- USB 3.0 SATA 3.0 PCIe 2.0 XAUI MultiPHY
- PCIe 3.0, 2.1, 1.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
- PCIe 4.0 SerDes PHY
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
- USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+