PCIe 4.0 PHY IP with 16GT/s optimized for low power consumption (Silicon Proven in TSMC 28HPC+)
T2M provides a portfolio of silicon-proven IP for PCI Express consisting of controllers, PHYs, verification IP, IP Prototyping Kits, Software Development Kits and Interface IP Subsystems. As the industry standard for PCI Express, solution which T2M offers is in volume production and has been successfully implemented in a wide range of applications.
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Block Diagram of the PCIe 4.0 PHY IP with 16GT/s optimized for low power consumption (Silicon Proven in TSMC 28HPC+)
PCIeIP IP
- PCIe 3.0 PHY IP with 8GT/s optimized for low power consumption (Silicon Proven in TSMC 28HPC+)
- PCIe 4.0 PHY IP with 16GT/s optimized for low power consumption (Silicon Proven in TSMC 12FFC)
- PCIe 5.0 PHY IP with 32GT/s optimized for low power consumption (Silicon Proven in TSMC 12FFC)
- PCIe 5.0 Controller IP supporting Root Complex, End Point, Switch Port compliant with PCIe 5.0/4.0/3.0/2.0/1.0 and fully synthesizable
- PCIe 2.0 PHY IP (Silicon Proven in SMIC 55LL/ SP/ EF)
- PCI Express 2.0 PHY IP Core(Silicon Proven in UMC 28HPC)