English
You are here:
PCIe 4.0 PHY with 16GT/s in TSMC(12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. The PCIe 4.0 IP supports a complete range of PCIe 4.0 Base applications and is compliant with the PIPE 4.4.1 specification. The IP integrates high-speed mixed signal circuits to support PCIe 4.0 traffic at 16Gbps. It is backward compatible with PCIe 3.1 data rate at 8.0Gbps, PCIe 2.1 data rate at 5.0Gbps and PCIe 1.1 data rate at 2.5Gbps. With the supports for both TX and RX equalization techniques, the PCIe 4.0 IP can meet the requirements for different channel conditions.
View PCIe 4.0 PHY with 16GT/s in TSMC(12nm,16nm) full description to...
- see the entire PCIe 4.0 PHY with 16GT/s in TSMC(12nm,16nm) datasheet
- get in contact with PCIe 4.0 PHY with 16GT/s in TSMC(12nm,16nm) Supplier
PCIe 4.0 IP
- PCIe 5.0 Customizable Embedded Multi-port Switch
- PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- PHY/PCS Logical Sub-Block IP Core for PCIe supporting PCIe 5.0, 4.0, 3.1 PHY/PMA and compliant to the PIPE 5.2 and 4.4.1 Specifications
- PCIe 4.0 PHY in GlobalFoundries (14nm)