Performance Mode Option for ARC EM Processor
The DesignWare ARC EM Performance Mode Option provides a coarse-grained multi-tasking architecture featuring a 4-cycle hardware context switch, which allows for higher performance in real-time, low-latency control applications while adding wider memory interface support to improve system I/O performance.
With the performance mode option enabled, the external task controller can choose any task to run next with a context switch based on the Task ID and C-based software development with no need for an RTOS.
In addition, the performance mode option also provides the ability to configure the memory interface to the closely coupled memories (CCM) with 32-, 64- or 128-bit data widths, enhancing the bandwidth and throughput of memory transactions.
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Block Diagram of the Performance Mode Option for ARC EM Processor

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