4Kx16 Bits OTP (One-Time Programmable) IP, UMC 110 nm 1.2V/3.3V L110AE Process
Peripheral Direct Memory Access Controller
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Block Diagram of the Peripheral Direct Memory Access Controller IP Core
![Peripheral Direct Memory Access Controller Block Diagam](http://www.design-reuse.com/sip/blockdiagram/43273/20170823023451-main-CC-PDMA-AXI-AXI_2_designreuse.jpg)
DMA IP
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 4.0 Controller with AMBA AXI interface
- PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface
- General Purpose & Bridge DMA
- NAND Flash Memory Controller with DMA
- CAN 2.0 Controller with DMA