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Peripheral Direct Memory Access Controller
The CC-PDMA-AXI-AXI is a synthesisable Verilog model of a peripheral direct memory access controller. The PDMA core can be efficiently implemented on FPGA and ASIC technologies.
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Block Diagram of the Peripheral Direct Memory Access Controller IP Core
DMA IP
- Configurable PCI Express 4.0 Controller for ASIC/SoC with a configurable AMBA AXI3/AXI4 user interface
- Configurable PCI Express 3.0, 2.0, 1.1 Controller IP for ASIC/SoC with AMBA AXI User Interface
- Northwest Logic DMA Back-End Core from Rambus
- Windows & Linux Drivers for the Expresso DMA Core from Rambus
- Northwest Logic AXI DMA Back-End Core from Rambus
- Northwest Logic High-performance PCIe-AXI Bridge and/or scatter-gather DMA from Rambus