Phase-frequency detector (PFD) is used to form a control signal VCO tuning. PFD compares phases of divided VCO signals and divided reference oscillator signals and detects phase difference. Charge pump generates pulses for the loop filter. This structure includes ECL charge pump and CMOS charge pump.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
- iHP SGB25V
- Input CMOS signal
- Low output current disbalance
- High lock detector accuracy
- Supported foundries: TSMC, UMC, Global Foundries, SMIC, iHP, AMS, Vanguard, SilTerra
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Phase-locked loop synthesizer