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Phase-frequency detector with charge pump - TSMC BiCMOS SiGe 180 nm

Phase-frequency detector (PFD) forms a control signal for VCO tuning. PFD compares phases of a divided VCO signal and a divided reference oscillator signal and detects phase difference. Charge pump generates pulses for the loop filter. The lock detector monitors the current status of PLL by comparing the phase difference of VCO divided signal and reference oscillator signal with required value.
Reference frequency 0.32..10 MHz.
The block is fabricated on TSMC 0.18 um SiGe BiCMOS technology.

Features

TSMC BiCMOS SiGe 180 nm
Input signals with low amplitude
Low disbalance of output current
VCO divided signal buffering and optimization
High accuracy
Supported foundries: TSMC, UMC, Global Foundries, SMIC, iHP, AMS, Vanguard, SilTerra

Deliverables

Schematic or NetList
Abstract model (.lef and .lib files)
Layout view (optional)
Behavioral model (Verilog)
Extracted view (optional)
GDSII
DRC, LVS, antenna report
Test bench with saved configurations (optional)
Documentation

Applications

Phase-locked loop synthesizer

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