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250MHz Multi-channel Analog Front-End (AFE) for LiDAR, 5G and imaging
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pico 2D Graphics Processor for Wearables/IoT
NEMA®|p is the smallest member of the NEMA®|GPU Series, and has been specifically designed to serve the need to build economically smart SoC's to drive small yet vibrant display applications.
Developing those area constrained applications can be challenging and a cost efficient graphic solution is a key element to succeed but without sacrificing graphics performance and dispense the ability of ultra-low power consumption. NEMA®|p has an incredibly small silicon footprint of just 0.074mm2 (475MHz @ 28nm), with leakage power GPU consumption of just 0.06mW. Implementing Think Silicon's proprietary framebuffer compression technology (TSCTMFB) limits memory power consumption to just 0.03mW (in DDR-less systems).
It features a programmable 2D graphics-rendering engine and has innovative composition functionalities while supporting Linux, RTOS, and Graphics APIs like uGFX and DirectFB. Bare metal library enables graphics applications development in embedded systems with no Operating System.
Developing those area constrained applications can be challenging and a cost efficient graphic solution is a key element to succeed but without sacrificing graphics performance and dispense the ability of ultra-low power consumption. NEMA®|p has an incredibly small silicon footprint of just 0.074mm2 (475MHz @ 28nm), with leakage power GPU consumption of just 0.06mW. Implementing Think Silicon's proprietary framebuffer compression technology (TSCTMFB) limits memory power consumption to just 0.03mW (in DDR-less systems).
It features a programmable 2D graphics-rendering engine and has innovative composition functionalities while supporting Linux, RTOS, and Graphics APIs like uGFX and DirectFB. Bare metal library enables graphics applications development in embedded systems with no Operating System.
Features
- Fully programmable engine with a VLIW instruction set
- Fixed point functional units
- Command list based DMAs to minimize CPU overhead
- Compression schemes
- TSCTM4 (4 bits per pixel)
- TSCTM6 / TSCTM6a (6 bits per pixel without/with alpha)
- 2D drawing
- Pixel / Line drawing
- Filled rectangles
- Triangles (Gouraud Shaded)
- Quadrilaterals
- Smart Composition
- One pass composition
- Hidden areas are not read from memory
- YUV layers are automatically processed without intermediate conversion
- Video scaler
- Blit support
- Rotation, Mirroring
- Stretch (independently on x and y axis)
- Source and/or destination color keying
- Format conversion
- RGB and YUV
- Text rendering supports
- A1 bitmap, A8 bitmap antialiased
- Subsampled antialiased
- Color formats
- 32/16/8 bit, with/out alpha, GreyScale, YUV, RGB.
- Full Alpha blending
- Programmable blending modes
- Source/Destination color keying
- Image transformation
- 3D Perspective Correct Projections
- Texture mapping
- Point sampling
- Bilinear filtering
- Antialiasing
- Quadrilaterals per edge Antialiasing
- Antialiased lines
Benefits
- Performance per mWatt per Dollar
- The NEMA®|GPU-Series performance per silicon area per clock frequency is unrivaled in its class. NEMA®|p has been designed to perform favorable against these critical performance benchmarks. As a result NEMA®|p uses 87% less active and 98% less idle power and has a 4 times smaller silicon footprint (compared to the competition), leading to significant cost reduction.
- Think Silicon's proprietary 4bpp (bits-per-pixel) real-time frame-buffer compression (TSCTMFB), the 6bpp texture compression and real-time de-compression (TSCTMT) benefits architects and finance controllers equally. The compressed images and the software libraries are so small in size that they fit into the internal SoC memory. As a result, expensive external DDR memory can be minimized or entirely eliminated. This reduces the SoC idle power consumption about impressive 98%, extends system battery life about 10 times and lowers the overall BOM cost. The combined performance and cost advantages make NEMA®|p to a Performance-Power-Cost leader in the class of 2D GPU's.
Deliverables
- Deliverables include: complete set of synthesis and STA (Static Timing Analysis) scripts, OS drivers (for Linux, FreeRTOS), graphics API software libraries (for uGFX, DirectFB, Qt) and standalone bare drivers.
- Documentation includes: IP manual, integration manual, software library manual including code samples, and demonstration platform application notes.
- A reference design systems and demo-sets are available for platforms: Xilinx Zynq, Altera SoCkit.
Applications
- NEMA®|p is the perfect candidate to support entry level IoT-platforms, wearable and embedded devices with low cost and ultra-low power requirements supporting SoC's with a 32-bit MCU (e.g. ARM® Cortex®M processors) and provide fluid 2D graphics experience for a wide range of applications.
- Developers are able to create compelling 2D Graphical User Interfaces (GUIs) and software applications with ultra-long battery life at a significantly lower cost for power-memory-area constrained IoT devices.
- For example, with core frequencies just as little as 25MHz, NEMA®d|p delivers a fast and brilliant 2D UI experience on a VGA (640x480) screen, without being limited to these parameters.
Block Diagram of the pico 2D Graphics Processor for Wearables/IoT
Video Demo of the pico 2D Graphics Processor for Wearables/IoT
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