180nm MTP Non Volatile Memory for Standard CMOS Logic Process
PLB Bus SD Card Controller (SD/SDHC/MMC) with optional DMA engine
The core allows software to efficiently execute send commands and receive responses to/from the SD card command interface while at the same time performing data transfers over the 1 or 4 bit data interface.
Programming is simplified by the built-in command request/response state machine and command CRC generation/checking blocks built into the core. The optional DMA function allows the CPU to continue with other tasks while data is being transferred. To allow for an even smaller footprint core, the DMA function can be opted out leaving a FIFO interface instead.
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