The PLBV46 Master Burst is a continuation of the Xilinx family of IBM CoreConnect compatible LogiCORE™ products. It provides a bi-directional interface between a User IP core and the PLB v4.6 bus standard. This version of the PLBV46 Master Burst has been designed for PLBV46 Master operations consisting of single data beat read or write transfers and Fixed Length Burst Transfers of 2 to 16 data beats.
- Compatible with IBM CoreConnect 32, 64 and 128-bit PLB
- Parameterizable data width of Client IP Interface (IPIC) to 32, 64, or 128 bits
- Supports Single Beat Read and Write data transfers up to the IPIC data width
- Automatic Conversion Cycle support for single data beat transfers to/from narrower PLB Slave devices