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Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
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PLL CMOS phase-frequency detector with ECL charge pump
Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal and detects phase difference. Charge pump generates pulses for loop filter. Reference frequency 0.32…10 MHz. Output current is 40...140.5 uA.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
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