English
You are here:
PLL phase-frequency detector with charge pump
Phase-frequency detector (PFD) forms a control signal for VCO tuning. PFD compares phases of a divided VCO signal and a divided reference oscillator signal and detects phase difference. Charge pump (CP) generates pulses for the loop filter. The structure consists of two types of PFD with CP: ECL and CMOS choosing by a bit PFD_TP. The lock detector monitors the current status of PLL by comparing the phase difference of VCO divided signal and reference oscillator signal with required value.
Reference frequency 24.84 MHz.
The block is fabricated on TSMC 0.18 um SiGe BiCMOS technology.
Reference frequency 24.84 MHz.
The block is fabricated on TSMC 0.18 um SiGe BiCMOS technology.
Features
- TSMC BiCMOS SiGe 180 nm
- Input signals with low amplitude
- Low disbalance of output current
- High accuracy
- Supported foundries: TSMC, UMC, Global Foundries, SMIC, iHP, AMS, Vanguard, SilTerra
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Applications
- Phase-locked loop synthesizer
View PLL phase-frequency detector with charge pump full description to...
- see the entire PLL phase-frequency detector with charge pump datasheet
- get in contact with PLL phase-frequency detector with charge pump Supplier
Phase-frequency detector charge pump CP PFD IP
- Phase-frequency detector with charge pump
- Phase-frequency detector with charge pump (input amplitude 150…210 mV)
- Phase-frequency detector with charge pump
- PLL ECL phase-frequency detector with ECL charge pump
- 1 to 20 MHz Phase-frequency detector and charge pump
- PLL 24.84 MHz phase-frequency detector with charge pump