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Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz
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Poly Phase CMOS Programmable Frequency Divider (50-2400 MHz)
Features
- 1. Programmable Divider
- 2. 5 to 10 Bit dividing facility.
- 3. Poly Phase output facility.
- 4. Ease of customization and fast deliverable IP as per customers need.
- 5. GDSII for ASIC and programmable bit stream for FPGA’s as deliverables.
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Frequency Divider IP
- Programmable 9-bit CMOS frequency divider (2…511 dividing ratio)
- Programmable CMOS frequency divider (32...16383 dividing ratio)
- Programmable frequency divider (56 to 16383 dividing ratio)
- Programmable CMOS frequency divider (56..16383 dividing ratio)
- Programmable 6-bit CMOS frequency divider
- 0.1 to 1 GHZ Frequency Divider