90nm OTP Non Volatile Memory for Standard CMOS Logic Process
Programmable frequency divider (56 to 16383 dividing ratio)
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
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frequency divider N-divider IP
- Programmable 9-bit CMOS frequency divider (2…511 dividing ratio)
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- Programmable CMOS frequency divider (56..16383 dividing ratio)
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- Phase-locked loop clock generator
- Wide band 3Ghz-6GHz fractional phase-locked loop