The LVDS circuit consists of transmitter (LVDSOUT), receiver (LVDSIN) and bias. The LVDS transmitter consists of a current source (nominal 3.5 mA) that drives the differential pair lines and common-mode regulator that provides the output common-mode voltage signal equal 1.25 V. The output current adjustment is defined by the digital code register ilvo<2:0>. The receiver has high DC input impedance (~MΩ), so the majority of driver current flows across the 100 Ω external termination resistor generating about 350 mV across the receiver inputs. When the driver switches, it changes the direction of current flow across the resistor, thereby creating a valid “one” or “zero” logic state. That is it transforms input 350 mV signal to CMOS 1.8 V output signal. The internal current adjustment is defined by digital code register ilvi<2:0>.