QSGMII/SGMII/1000BASE-X and MAC
The West-bound interface from the MAC provides a configurable 32-bit system interface.
The East-bound interface performs the mapping of transmit and receive data streams (at the PMA layer) to the on-chip SERDES.
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Block Diagram of the QSGMII/SGMII/1000BASE-X and MAC IP Core
![QSGMII/SGMII/1000BASE-X and MAC Block Diagam](http://www.design-reuse.com/sip/blockdiagram/47748/20200312032349-main-Capture-QSGMII.jpg)
QSGMII IP
- MIPHY Consumer SerDes IP, Silicon Proven in ST 28FDSOI
- QSGMII
- Networking SerDes IP, Silicon Proven in ST 28FDSOI
- Multi Standard programmable SERDES PHY with single/multi-lane configurations with support of long-reach channel
- 10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC
- Mobiveil’s P3041 AMC Board