The RTCmodule implements the standard functionality of a Real Time Clock. With a synchronous system interface, the module can be integrated in a wide range of systems, from small CPU to a ARM AMBA system.
- External or internal reference time
- Counts milliseconds, seconds, minutes, and hours of the day
- Counts days, months, and years
- Automatic end-of-month and leap year recognition
- 2 alarm interrupts
- Second, minutes, hour, day, month, and year over-roll interrupts
- Time and date are counted in BCD format.
- The time is in 24-hour format
- Special test mode to increase test coverage and accelerate system test
- Synchronous bus interface
- Zero wait-states
- Supports system bus' such as AMBA APB version 2.0
- Technology independent
- Upon synthesis, several configurations are available to optimize the core for the target application:
- Number of timer alarms
- CPU readback. Configuration value readback can be disabled to minimize gate count.
- With a separate APB wrapper, the core can be used in ARM subsystems.
- Synthesis options are included to use the core in 8, 16 and 32-bit systems.
- VHDL or Verilog RTL Source Code
- Functional Testbench
- Synthesys Script
- Data Sheet
- User Guide
- Hotline Support by means of phone, fax and e-mail
Block Diagram of the Real Time Clock (RTC) IP Core