Single Port, Ultra Low Leakage, GF 22FDX, Register File Compiler
Reed-Solomon Code With Fixed (n, k)
Features
- The following features are for the Industry standard (255, 239) Reed-Solomon Encoder:
- Available for Xilinx FPGA or ASIC implementation
- High speed design, reaches 1.6 Gbps data rate in Virtex II, or 1.2 Gbps in Spartan III, higher in ASIC
- Compact design, uses 156 CLB slices in Virtex II, or 165 CLB slices in Spartan III, among the smallest on the market
- Can work continuously with no gap between code blocks
- Fully synchronous one clock design
- One clock cycle latency
- The following features are for the Industry standard (255, 239) Reed-Solomon Decoder:
- Available for Xilinx FPGA or ASIC implementation
- High speed design, reaches 1120 Mbps data rate in Virtex II, or 960 Mbps in Spartan III, higher in ASIC
- Compact design, uses 691 CLB slices in Virtex II, or 699 CLB slices in Spartan III, is the smallest on the market
- Can work continuously with no gap between code blocks
- Fully synchronous one clock design
- 255+97 clock cycle latency
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