MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (N5, N3E, N3P)
Reed-Solomon Compiler, Decoder
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DSP IP
- High Performance Scalable Sensor Hub DSP Architecture
- Modern Audio DSP, designed for battery operated, high-performance, audio and voice applications
- Modern, high performance Audio DSP, optimized for far-field noise reduction and Artificial Intelligence speech recognition
- High-efficiency vector DSP cores for 5G and 5G-Advanced
- Tensilica Fusion F1 DSP
- Tensilica HiFi 5 DSP