Digital Precorrection (Predistortion) system used to compensate for the non-linearity of an RF power amplifier. Compensates for both Gain and Phase. The design may be used in open-loop configuration or in closed-loop configuration as part of an adaptive precorrection system.
Complex LUT stores the inverse (AM-AM) and (AM-PM) characteristics of the Amplifier. Optional choice of programming interfaces (I2C, SPI or UART) may be provided as an extra.
- Corrects the PA Gain and Phase responses
- 16-bit signed (I/Q) inputs and outputs
- 256x32-bit LUT to store inverse PA characteristic
- LUT initialized at compile time or modified in-circuit
- Suitable for open or closed-loop operation
- Operation at Baseband or IF frequencies
- Typical improvements of 20dBs in the 'shoulders'
- Pipeline latency of only 8 clock cycles
- Technology independent IP Core
- Suitable for FPGA and ASIC
- Supplied as human-readable source code
- One-time license fee with unlimited use
- Field tested and market proven
- Any custom modification on request
- VHDL source-code (or Verilog on request)
- Simulation testbench
- Examples and scripts
- Full pdf datasheet
- One-to-one technical support
Block Diagram of the RF Power Amplifier Precorrection System IP Core