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RISC-V processor
Piccolo is an efficient, free, plug-n-play RISC-V processor core delivering the key benefits of open source
Features
- RV32IM ISA
- 1.9 DMIPS/MHz
- 100 MHz
- 3-stage pipeline
- AXI4-Lite interface
- < 3000 LUTs
- 4KB Instruction & Data caches
- Hardware multiply-divide
- Hardware-based remote GDB
Benefits
- Simplification
- Save considerable time by using a single processor architecture across all semiconductor platforms (Xilinx, Altera, ASIC, …).
- Innovation
- Differentiate with your proprietary enhancements and customizations to open source code modified by you or 3rd party RISC-V developers.
- Control
- Make product and business decisions independently of proprietary IP companies by owning source code to processor cores.
Block Diagram of the RISC-V processor IP Core
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RISC-V processor IP
- Low-power 32-bit RISC-V processor
- Compact RISC-V Processor - 32 bit, 3-stage
- RISC-V processor - 32 bit, 5-stage pipeline
- Compact, efficient 64-bit RISC-V processor with 5-stage pipeline
- Linux capable 64-bit RISC-V processor core with 7-stage pipeline
- Digital and mixed-signal IP and ASIC RISC-V reference design for USB Type-C/PD power adapter/charger