RLDRAM II Controller
The RLDRAM II controller is optimized for Altera® Stratix® IV, Stratix III, Stratix II, Stratix GX, and HardCopy® II devices. The advanced features available in these devices allow you to interface directly to RLDRAM II devices.
IP Toolbench generates the following items:
* A testbench, which instantiates the example design
* A synthesizable example design that instantiates the following modules: * RLDRAM II controller: * Encrypted control logic, which takes transaction requests from the local interface and issues writes, reads, and refreshes to the memory interface
* A clear-text datapath
* Example driver?generates write, read, and refresh requests and outputs a pass/fail signal to indicate that the tests are passing or failing
* System phase-locked loop (PLL)?generates the RLDRAM II controller clocks
* Delay-locked loop (DLL)?instantiated in DQS mode and generates the DQS delay control signal for the dedicated DQS delay circuitry
* Optional feedback clock PLL?instantiated in non-DQS mode and generates a capture clock for the datapath read capture and logic path
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