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Switching regulator, inductor-based, PWM mode, high efficiency
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RTP Receiver
The MVD RTP Receiver allows the reception and the processing of an RTP stream.
The RTP receiver stores the incoming RTP packets into an external memory (for example in DDR3). During RTP packet reception, the RTP receiver analyses the different fields of the incoming RTP packet and reorder (if necessary) the incoming packet in the external memory. After the receiver has stored sufficient number of RTP packets (depending on RTP payload length), the RTP receiver will present the valid data on the output bus .
As the accepted payload is only MPEG2-TS, the used Timestamp clock value is only 90kHz. An efficient compensation for the clock value 90kHz is implemented inside the RTP Receiver which permits to compensate the clock drift (±100 ppm).
The RTP receiver stores the incoming RTP packets into an external memory (for example in DDR3). During RTP packet reception, the RTP receiver analyses the different fields of the incoming RTP packet and reorder (if necessary) the incoming packet in the external memory. After the receiver has stored sufficient number of RTP packets (depending on RTP payload length), the RTP receiver will present the valid data on the output bus .
As the accepted payload is only MPEG2-TS, the used Timestamp clock value is only 90kHz. An efficient compensation for the clock value 90kHz is implemented inside the RTP Receiver which permits to compensate the clock drift (±100 ppm).
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Block Diagram of the RTP Receiver IP Core
