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High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
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SATA Host Controller
HCLSATAHC26113G core handles data movement between system memory and a SATA device. The core implements transport layer & link layer functions.
HCLSATAHC26113G is fully compliant with SATA 2.6 specification and with the AHCI (Advanced Host Controller Interface) specification 1.1. The core supports both 1.5Gbps and 3Gbps data transfer rates.
The core has a flexible application/system bus interface and currently supports AMBA AHB interface. On the PHY side the core supports SAPIS/Vendor specific interface.
HCLSATAHC26113G implements flow control functions to offload CPU and handles automatic data transfer on the SATA interface.
HCLSATAHC26113G is fully compliant with SATA 2.6 specification and with the AHCI (Advanced Host Controller Interface) specification 1.1. The core supports both 1.5Gbps and 3Gbps data transfer rates.
The core has a flexible application/system bus interface and currently supports AMBA AHB interface. On the PHY side the core supports SAPIS/Vendor specific interface.
HCLSATAHC26113G implements flow control functions to offload CPU and handles automatic data transfer on the SATA interface.
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