SATA IP core compliant with the Serial ATA specification revision 3.0 and work on Xilinx UltraScale and 7-Series device.
This IP core provide link layer. Design Gateway provide transport layer and 150MHz GTX physical layer design for 6.0Gbps SATA-III interface as reference design. It can connect with SATA-III HDD directly without external PHY chip.
- Compliant with the Serial ATA specification revision 3.0
- Support both of SATA Host and SATA Device (Applicable to SATA Peripheral development)
- Compact and small resource usage (less than 500 Slices), suitable for multi-channel RAID system
- Adopted by NASA, proven high reliability
- Simple transaction interface with Host processor or DMA Engine
- 32-bit internal data path
- 4KB FIFO implemented by BlockRAM in transmit and receive paths
- Support SATA-III/II (SATA-I support is also possible by PHY parameter settings change)
- Low frequency operation
- IP Core and PHY clock 150MHz for SATA-III
- IP Core clock 75.0MHz and PHY clock 150MHz for SATA-II
- IP Core clock 37.5MHz and PHY clock 75MHz for SATA-I
- CONT primitive support for continue primitive suppression to reduce EMI
- Support 40bit width PHY implemented by 7-Series GTX
- Able to evaluate on Xilinx FPGA boards before purchasing the IP core
- Support AHCI, Linux boot up from Zynq-7000 device.
- Host Controller IP (HCTL IP) is available to be provided with SATA-IP core.
- FAT32 file system management without CPU usage (Option)
- Support exFAT file system (Option)
Block Diagram of the SATA IP core Kintex UltraScale IP Core