SDXC Host Controller

Features

• Compliant with SD specification version 3.0
• Supports 32 bit AHB LITE synchronous Host interface working at SOC interface frequency.
• 1-bit/4-bit modes of SD/SDIO supported.
• Supports following UHS –I modes of operations.
• DS – Default speed mode up to 25MHz 3.3V signaling
• HS – High Speed mode up to 50MHz 3.3V signaling
• SDR12 – SDR up to 25MHz 1.8V signaling
• SDR25 – SDR up to 50MHz 1.8V signaling
• SDR50 – SDR up to 100MHz 1.8V signaling
• DDR50 – DDR up to 50MHz 1.8V signaling
• One data Transmit FIFO with 32-bit write width and 256 depths.
• One data Receive FIFO with 32-bit read width and 256 depths.
• SDIO Interrupts, Suspend/Resume Operation and SDIO Read Wait Operation are supported.
• Buffers to store the response received.
• Command buffers to store command index and argument.

Benefits

• To give the latest SD specification version support SD 3.0
• To enable memory storage (SDXC memory card) and input/ output (SDIO card) features in the product

Deliverables

• ...

Applications

• Handheld devices and consumer electronics
• SOC Integration with processor, where the processor in the platform doesn’t support SDXC interface

Block Diagram of the SDXC Host Controller IP Core

• see the entire SDXC Host Controller datasheet
• get in contact with SDXC Host Controller Supplier