Secure Hash Algorithm
The core is supplied as VHDL source code with a comprehensive testbench supporting random testing and the NIST Secure Hash Algorithm Validation System.
Algotronix can also provide a design service to extend or tailor the core to meet the specific requirements of your application.
View Secure Hash Algorithm full description to...
- see the entire Secure Hash Algorithm datasheet
- get in contact with Secure Hash Algorithm Supplier
SHA IP
- AES + SHA DMA Crypto Accelerator
- 256-bit SHA Cryptoprocessor Core
- SHA IP Core with native SHA2-256 HMAC support
- SHA 256-bit hash generator
- Tunable HMAC accelerator - compliant with all hash functions (SHA1, SHA2, SM3, SHA3) - optional SCA protection
- TESIC RISC-V CC EAL5+ Secure Element Soft/Hard Macro