Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
SelectIO Interface Wizard
Xilinx provides an easy to use wizard to configure the SelectIO blocks in Xilinx FPGAs.
The LogiCORE™ IP SelectIO™ Interface Wizard provides an intuitive customization GUI that helps users configure SelectIO blocks on Xilinx FPGAs to support their design requirements. The wizard generates an HDL wrapper that configures the SelectIO blocks such as IOSERDES and IODELAY and connects them to IO clock primitives in your design. Includes built-in templates to automate configuring of SelectIO to support various standard interfaces (SGMII, DVI, Camera Link, Chip to Chip) and a range of I/O signaling standards (LVCMOSxx, HSTLxx, SSTLxx).
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Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC