SerDes PHY IP in TSMC (7nm, 12/16nm, 28nm)

M31 SerDes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. The SerDes IP has supported data rates from 1.25G to 10.3125Gbps including XFI, SFI, 10GBASE-Kr, CEI, XAUI, USXGMII, QSGMII and SGMII. With the supports for both TX and RX equalization techniques, the SerRDes IP can meet the requirements for different channel conditions.

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