The SPI provides full-duplex, synchronous, serial communication between peripheral devices and is programmable from a host CPU through the AMBA APB bus. It transfers and receives data simultaneously using a common data clock, which synchronises the transfer of serial data. Transfer size and format are configurable within the SPI. The SPI can be configured to operate as a master or slave module. When operating in master mode, the SPI controls data transfers to and from slave modules. In master mode, it does not respond to any transfers initiated by another master SPI and only receives data while simultaneously transferring data. When operating in slave mode, the SPI responds to requests and slave select signals from a master SPI and does not initiate any transfers. A slave SPI only transmits data while simultaneously receiving data.