Helion have available a number of solutions which implement the SHA-1 algorithm; we consider the "Fast" version here, which is aimed at applications requiring data throughputs up to the 1 - 2Gbps range.
These powerful building blocks have been designed to offer stand-alone hardware acceleration of the arithmetically intensive hashing function. Where previously this function might have been handled in software, modern wire-speeds are exceeding these capabilities, and hardware assistance is becoming a very attractive alternative. These cores fill this requirement with a well proven, easy to use and efficient solution.
Helion's Fast SHA-1 cores aim to offer this functionality at high data rates whilst occupying only a moderate logic area. They can process both plain hashing, and keyed HMAC (with optional HMAC wrapper), and can also optionally support state unload and reload part way through a message, which may be useful when dealing with fragmented data.
These high performance cores are available in versions for use in ASIC, Actel, Altera and Xilinx FPGA, and in common with all Helion IP cores they have been designed with each technology firmly in mind to yield the very best and most efficient results. For more detailed information on these cores, please download the appropriate datasheet below.