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SHA-3 Crypto Engine
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hashing rounds per clock cycle to optimize the silicon resource/performance ratio. Fixed-length or extendable-output (XOF) functions can simply be chosen per individual message through configuration settings.
Features
- ASIC and FPGA
- FIPS 202 compliant
- Supported fixed-length functions:
- SHA3-224
- SHA3-256
- SHA3-384
- SHA3-512
- Supported XOF functions:
- SHAKE128
- SHAKE256
- Context save and load
- Very high throughput
- Low power feature
- Control interface
- Compact solution
- Data interface: AMBA (AXI/AHB) with optional DMA
- Control interface: APB/AXI4-lite
Benefits
- Standardized AXI-4 and AHB (optional) I/O simplifies system integration. Accountability is guaranteed by single RTL database for all configurations in either ASIC or FPGA application. It is delivered with software drivers for easy integration.
Deliverables
- Netlist or RTL
- Scripts for synthesis
- Self-checking TestBench based on FIPS vectors
- Documentation
Applications
- Encrypted data storage
- Secure communications
- Secure processing
- IPsec acceleration
- E-commerce
- VPN
- Financial Transactions
Block Diagram of the SHA-3 Crypto Engine IP Core
View SHA-3 Crypto Engine full description to...
- see the entire SHA-3 Crypto Engine datasheet
- get in contact with SHA-3 Crypto Engine Supplier