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SHA1 core with APB interface
The eSi-SHA1 core is an easy to use SHA1 hash accelerator peripheral with an APB bus interface.
SHA1 is a cryptographic hash function designed by the United States National Security Agency and is a U.S. Federal Information Processing Standard published by NIST
SHA1 is a cryptographic hash function designed by the United States National Security Agency and is a U.S. Federal Information Processing Standard published by NIST
Features
- Simple register based interface
- 82 clock cycles per 512 bits of input data
- AMBA 3 APB slave interface
- DMA flow-control interface
- Verilog 2001.
Benefits
- low gate-count
- easy to use
Deliverables
- RTL
- Testbench
- Software libraries
Block Diagram of the SHA1 core with APB interface IP Core
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