SiFive’s PCS IP is fully compliant to the IEEE 802.3 standard supporting various MAC rates like 10G, 25G, 40G, 50G, 100G, 200G and 400G.
Built upon a flexible and robust architecture, SiFive’s PCS IP core is compatible with different MII interfaces for connecting to the MAC. The PCS IP is intended to support the Ethernet and Flex Ethernet interfaces.
- Supports multi rate 10G/25G/40G/50G/100G/200G/400G
- Supports 64b/66b encoding/decoding
- Supports scrambling/descrambling
- Supports configurable alignment marker
- Supports transcoding functions
- Supports multi-lane distribution across virtual lanes
- Supports various statistics counters
- Supports test pattern generation
- SiFive’s PCS IP core supports the IEEE 802.3x standard.
- Designed and tested to be easily synthesizable into many ASIC technologies, the SiFive PCS IP is uniquely built to work with off-the-shelf MAC & SerDes from leading technology vendors. Using vendor-specific proven MAC & SerDes allows for fast and seamless integration of the PCS IP into the technology of choice.
- Synthesizable RTL
- Template CAD scripts for synthesis and static timing
- Assertions for the user interface and config registers
- Sanity test simulation environment
- RX/TX BFMs
- SiFive IP Specification
- Memory-Mapped Register Manual
- Design Verification Plan
- Packet Processing/NPU
- Traffic Management
- Switch Fabric
- Switch Fabric Interface
- FPGA etc.