Silterra 0.11um High Density Single-Port SRAM Compiler
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon SMSB 0.11 Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, 6 , 7 or 8 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
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