LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm geometry and supports auto grade temperature and quality.
G1 is cost effective Flash solution up for medium memory capacity requirement up to several 100KBytes.
G1 also allows user to re-use IPs and Macros developed for standard CMOS platform because the adoption of G1 process module does not change characteristics of the logic transistors and SPICE model.
- High Temperature Operation
- SONOS is the device which enables memory functionality trapping electrons in Silicon Nitride film, and the retention life is controlled by optimization of thickness and film properties of oxide and Silicon Nitride films. G1 is able to support operation temperature up to 125C and 20years of data retention life at 125°C.
- Large Programming Size enables Short Testing Time
- G1 uses FN tunneling technology to achieve extremely low power in program and erase.
- It consumes 1/1,000,000 times current, compare toconventional technologies using hot carrier injection for program/erase operation.
- This also helps reducing testing time, which dominates large portion of the chip cost.
- Low Cost
- Short Test Time: G1 achieves very short test time for two reasons.
- 1.Extremely low power in program/erase allows tester to program/erase the whole memory mat at once, compare to conventional solution program/erase smaller sections for many many times to program/erase the whole memory mat.
- 2.Sharp Vt distribution in programming will eliminate the requirement for multiple programming and verification, so that programming operation always completes at one time, not in multiple steps, to dramatically reduce programming time.
- Short Baking Time: Floadia’s unique memory architecture simplifies Life Time Prediction of the memory cell, which allows chip company to screen devices with shorter baking time.
- 2-3 Mask adder: G1 requires only 2 to 3 additional masks on standard CMOS process, reducing expensive mask cost to implement NVM feature on your chip. Conventional solution will usually take around 10+ additional masks and uses special manufacturing process.
- Re-use of existing IP asset: Unlike normal Flash IPs, our Flash IP does not affect SPICE model of the logic transistors, which means you can utilize existing IPs and assets that has been developed, and will eliminate additional IP investment specific for Flash ICs.
Block Diagram of the Simple Low Cost SONOS Flash. Available in affordable 90nm foundry process